1. Technical Field
This invention relates to analog signal processing, and more particularly to an electronic level shifting circuit which shifts a source voltage signal by a fixed potential difference thereby producing a level shifted voltage signal. Specially, this invention relates to a level shifting circuit which is formed as an integrated circuit or a part thereof and which operates using current-controlled voltage offsetting circuitry.
2. Description of the Related Art
Programmable analog ICs (integrated circuits), such as the ispPAC10(trademark) in-system programmable analog integrated circuit from Lattice Semiconductor Corporation, are well known in the art. The ispPAC10(trademark) is described in publication anxe2x80x946008xe2x80x9401 published by Lattice Semiconductor Corporation in September 1999. Typically, programmable analog ICs are implemented in MOS (metal oxide semiconductors), contain a plurality of instrumentation grade operational amplifiers and summing amplifiers and are fully differential from input to output, that is they are designed to handle differential signal inputs. Oftentimes such differential signals may have a common mode voltage approximating ground or one or other signal may be tied to ground. Since it is easier to accurately handle signals with an analog IC that are at least one nominal FET (metal oxide semiconductor field effect transistor) threshold voltage above ground (800 millivolts or so) then it becomes desirable to be able to apply a level shift to incoming signals. Such a shift might typically be 1.2 volts thus allowing analog signals to have a 2.8 volt swing and still remain a comfortable FET threshold voltage below a nominal 5 volt supply. For these and other reasons high performing level shifting circuits are provided in programmable analog ICs. Such level shifting circuits operate on signals to and/or from the amplifiers contained in the analog ICs.
FIG. 1 shows a prior art single ended level shifter using a constant current source 101 operating with a resistive load 102. A p-channel FET 103 (metal oxide semiconductor field effect transistor) operates in the saturation region as a source follower and is responsive to input voltage Vin. Assuming a high impedance load, since the output is a voltage, all of the current I (DCxe2x80x94direct current) generated by source 101 passes through resistance 102. Therefore, the output voltage (Vout) is the sum of the input signal voltage Vin plus the ohmic voltage drop across resistor 102 plus an offset due to the threshold voltage of the FET 103. To produce a desired voltage shift between Vin and Vout it is generally necessary to compensate for manufacturing variations in characteristics of the FET, the resistor, and the current source. Such compensation may typically be achieved by adjusting the value of I, the current generated by source 101, though other methods of adjustment may be possible.
FIG. 2 shows an analogous prior art level shifter that is essentially the n-channel equivalent or dual of the shifter shown in FIG. 1. In this case n-channel FET 203 operates as a source follower and is responsive to input voltage Vin. Constant current source 201 pulls current down through resistance 202 to offset voltage Vout from Vin. Analogous offset adjustment considerations apply as for the p-channel FET based shifter of FIG. 1.
The gate of a FET is sometimes referred to as the xe2x80x9ccontrol terminalxe2x80x9d and the source and drain may be referred to as the xe2x80x9cpair of current terminalsxe2x80x9d. Level shifters of the types shown in FIGS. 1 and 2 may thus be generically described as having a constant current source, a resistive load connected thereto, a FET with one of its pair of current terminals connected to the resistive load and the other terminal connected to a fixed potential. The voltage input terminal of such a level shifter is connected to the control terminal of the FET and the shifted voltage output terminal connected to the resistive load and the current source.
In previously developed level shifters, precision components are often used to produce a compensated precision amount of level shift in an essentially open loop manner, that is, the parametric values of the precision components determine the amount of level shift produced.
When instrumentation baseband differential signals, as opposed to single ended signals, are involved and common mode level shifts are desired, it becomes even more important that voltage shifts be precise. An equal shift must be applied to each side of the differential signal conductor pair in order to avoid introducing offset errors into the signal. Thus, there is a need for a level shifting circuit, which is not only precise and stable but also highly reproducible within a subsystem.
Conventional level shifting circuitry cannot produce a level shifter that is as precise, stable and reproducible as the inventive level shifter without suffering other disadvantages such as excessive manufacturing cost.
Accordingly, a level shifting circuit that is precise, stable, reproducible and economic is presented. The shifting circuitry automatically calibrates out offset errors which may have unidentified origins.
The present invention provides for a level shifting circuit that includes multiple identical copies of a level shifter circuit, the multiple copies typically being created with identical geometry on a shared substrate. In an embodiment of the invention, one copy of the level shifter circuit (known as the reference level shifter) is used in a closed loop to determine the bias current needed to produce an offset voltage that matches a precision reference source. The bias current of the reference level shifter is reproduced in the other level shifters. Process and operational temperature, as well as other error source limited the performance of the previously developed devices. In the inventive devices, variations temporal and otherwise) are compensated for to the extent that they occur equally in all copies of the level shifter.
The level shifting circuitry disclosed includes a xe2x80x9cconstantxe2x80x9d (i.e. high source impedance) current source (the bias current source), together with an open-loop level shifter. The bias current source provides operating current for the level shifter. The bias current source is implemented by a circuit that includes a further copy of an open-loop level shifter of the same design in an op-amp (operational amplifier) closed-loop control. This latter level open-loop shifter is the reference level shifter. Best performance results when the two copies of the open-loop level shifter comprised within the complete level shifting control circuit are of near identical characteristics.
In one embodiment, the closed-loop control operates as follows:- The op-amp receives a reference input voltage and produces an output voltage which is used to control a bias current. The bias current controls the reference open-loop level shifter that shifts a ground potential input by an offset voltage. The offset voltage is fed back to the op-amp to produce an operating point wherein the offset voltage is set to equal the reference voltage. A second, equal, bias current is created using the same op-amp output voltage and that second bias current is used to control a second open-loop shifter that receives an input signal and produces a desired output offset shifted signal. Other embodiments of closed loop control are possible within the general scope of the invention.
In a typical application, additional circuitry is added for reproducibility, consistency and performance improvements as well as for robustness and power up power down sequencing to avoid metastability, degradation and/or damage. Careful attention is paid to layout to ensure best performance. Moreover, in a practical circuit additional level shifters will be present to provide additional xe2x80x9cchannelsxe2x80x9d (corresponding pairs of inputs and outputs). Thus, a relatively simple multiple channel device would typically be provided with only one bias current source but multiple channels that all operate with the same input to output offset. That the channels are very well matched, in a practical device, is desirable so that a voltage offset may be applied to each leg of a differential signal with only an acceptable level of differential error being introduced.
In one embodiment of this invention, an entire multiple-channel level shifting control circuit is formed on part of a single semiconductor substrate using CMOS (complementary metal-oxide semiconductor) techniques.
The foregoing is a summary and this contains, by necessity, simplifications, generalizations and omissions of detail; consequently, those skilled in the art will appreciate that the summary is illustrative only and is not intended to be in any way limiting. As will also be apparent to one of skill in the art, the operations disclosed herein may be implemented in a number of ways, and such changes and modifications may be made without departing from this invention and its broader aspects. Other aspects, inventive features, and advantages of the present invention, as defined solely by the claims, will become apparent in the non-limiting detailed description set forth below.